DSL ChipWeb logo



New Chip
New Modem/NIC


MP4 Videos
zum DSL-Test


DSL Chip Database

  • Previous: G7000 Family ADSL CPE Integrated USB
  • Up: List all categories

    LSI (LSI Logic Corperation ) : SpeedREACH DPS8003

    G.lite Analog Front End

    LSI Logic - SpeedREACH DPS8003 The DPS8003 is an analog front-end (AFE) that is designed to perform all of the analog functions of the receive (RX) and transmit (TX) paths for ADSL for G.lite, excluding POTS reject filtering and high-voltage line drivers/receivers.
    The DPS8003 requires no external circuitry beyond a pair of precision resistors and bypass/coupling capacitors.
    Note that
    1. for full compliance with the ITU G.992.2 transmit PSD masks, additional off-chip filtering in the TX path is needed;
    2. in frequency division multiplexing (FDM) systems, additional off-chip bandsplit filtering may be required for system optimization.
    • ADSL AFE for CPE with full receive (RX) and transmit (TX) analog signal path for G.lite (excluding POTS reject filter and high-voltage line drivers/receivers)
    • Fully monolithic: 2 precision resistors, 2 non-critical resistors, and decoupling capacitors required
    • Support for both echo-cancelled and FDM-based systems; full analog path support in hardware
    • Compatible with ITU G.992.2 (G.lite) standard
    • 14-bit linear ADCs and dual 14-bit linear DACs
    • 4th-order lowpass filters for RX/TX paths, with 5% cutoff frequency accuracy
    • RX channel: support for both 138 kHz and 276 kHz (for ADSL over ISDN)
    • TX channel: support for 552 kHz (G.lite)
    • RX path PGAs: 44 dB in 0.25 dB steps
    • TX path PAAs: 24 dB in 1 dB steps
    • Entire RX channel linearity: 80 dB MTPR
    • Entire TX channel linearity: 80 dB MTPR
    • 12-bit DAC to support external VCXO
    • RX input-referred noise at peak gain: 160 dBm/Hz at 300 kHz

    Technology: ADSL
    Package: unknown 0 Pin
    Linux support: No

    external WWW: LSI Logic Corperation : http://www.lsilogic.com/products/adsl/cust_premise.html web page used to be available at: http://www.lsilogic.com/products/adsl/cust_premise.html

    external PDF: LSI Logic Corperation : http://www.lsilogic.com/techlib/marketing_docs/ADSL/dps8003pb.pdf PDF documentation used to be available at: http://www.lsilogic.com/techlib/marketing_docs/ADSL/dps8003pb.pdf
    If you are the producer of this chip and want to correct/update the presented information, please feel free to register for direct database access.
ChipWeb Home

Last update: 14.11. 2009
Last link check: 01.03. 2006
All registered names and trademarks are the property of their respective owners.
No guarantee is given and no responsibility is taken for the information provided.
© 2024     Thomas Martin Knoll   knoll@chipweb.de   Impressum   Datenschutz
Life Cycle Costing (LCC)
back Kirche Reichenbach Vogtland Life-cycle cost (LCC) calculations