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  • Previous: PEF 22623 (SOCRATES-U) SDSL One Chip Rate Adaptive Transceiver with UTOPIA interface
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  • Next: PEF 22810, PEF 22815, PEF 22834 - PoVDSL chipset Packet over VDSL - Ethernet transport over standard 4-band VDSL

  • Infineon (Infineon Technologies AG ) : PEF 22810, PEB 22811, PEF 22812 - VDSL Chipset

    Very high bit-rate DSL ChipSet

    Infineon  VDSL Chipset  ICs The Infineon VDSL (Very High Bit - Rate DSL) building block delivers high performance broadband communication services over existing copper wire infrastructure in the last mile.

    Typical VDSL network applications include Fiber to the Curb/Cabinet (FTTC/FTTCab) and Fiber to the Home (FTTH) in an xPON topology.
    The Infineon VDSL solution uses Quadrature Amplitude Modulation (QAM) and has a standard ATM interface.
    The VDSL spectral allocation allows noise-free coexistence with other xDSL technologies in the same bundle.
    The Infineon VDSL building block is suitable for Central Office (CO) DSL Access Multiplexer (DSLAM) line cards and Customer Premises Equipment (CPE).

    Very High Bit - Rate DSL Chipset
    • PEF 22810 ( VDSL-L ; VDSL Line Driver Chip) / P-DSO-8
    • PEB 22811 ( VDSL-A ; VDSL Analog Chip) / P-MQFP-64
    • PEF 22812 ( VDSL-D ; Digital Transceiver) / P-TQFP-144
    • Quadrature Amplitude Modulation (QAM) line code
    • Frequency division duplexing
    • Line rates from below 1 Mbit/s up to 26 Mbit/s
    • Symmetric data rate of 13 Mbit/s
    • Asymmetric data rates up to 26 Mbit/s
    • Delivers up to a distance of 4000 ft / 1200 m
    • Robust operation on severely distorted lines
    • Spectral allocation allows noisefree operation with xDSL, ISDN (2B1Q/4B3T), ?Smartphone? digital PBX devices
    • Amateur radio and RFI compatible
    • Scrambler, Reed-Solomon Forward Error Correction (FEC) and Convolutional Interleaver with internal SRAM
    • Remote modem configuration
    • UTOPIA levels 1&2 interface
    • Additional data and clock interface for proprietary applications
    • Low power consumption - less than 1.5 W including line driver
    • Power backoff
    • Power downmode with fastwarm start capability (< 100 ms)
    • Embedded Digital Controlled Crystal Oscillator (DCXO) for timing recovery
    • Embedded microcontroller for stand-alone operation
    • JTAG for chip level and board level testing

    Technology: VDSL
    Package: unknown 0 Pin
    Linux support: No

    external WWW: Infineon Technologies AG : http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/prod_ov.jsp?oid=24758&cat_oid=-9202 web page used to be available at: http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/prod_ov.jsp?oid=24758&cat_oid=-9202

    external PDF: Infineon Technologies AG : http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=20782&parent_oid=24758 PDF documentation used to be available at: http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/public_download.jsp?oid=20782&parent_oid=24758
    If you are the producer of this chip and want to correct/update the presented information, please feel free to register for direct database access.
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