Tioga (Tioga Technologies ) : TA2040

PeakADSL (TM) Quad Analog Front End

Tioga’s PeakADSL (TM) TA2040 Quad-AFE is designed to interface seamlessly with Tioga’s TA1080 Octal ADSL transceiver chip.
It embodies four independent analog transmit and receive channels supporting G.dmt and G.lite. Each channel contains a 15-bit DAC with associated anti-imaging filters, a 15-bit ADC with anti-aliasing filter and a programmable gain-summing amplifier (PGA). All analog signal paths are differential. A clock multiplier and bandgap references are incorporated on-chip. A parallel data interface allows for high-speed data transfer of the transmit/receive data, while a serial interface is provided for control and configuration. Integrated transmit interpolation filters reduce the data rate required to be provided by the modem, thus, saving interface pins and power while maintaining the benefits of using a faster DAC update rate.

Features

• Integrates four complete full-rate ADSL Analog Front Ends (AFEs) on a single-chip
• High port density ideal for Central Office ADSL modem systems
• Programmable for all ADSL derivatives (ITU-T G.992.1, ITU-T G.992.2, ANSI T1.413 Iss. 2, ETSI TS101 388)
• Supports all ITU-T G.992.1 regional Annexes (A, B, C and H)
• Compatible with FDM and echo-canceling systems
• Retains re-programmability to address multi-port RT designs
• Includes analog filters and 15-bit A/D and D/A converters.
• Internal Interpolation filtering reduces interface transmit channel data rate.
• 0 to 48dB AGC range for each receive channel
• Excellent SFDR and input noise performance
• 0.35um CMOS, 3.3V power supply
• 216-pin EFBGA package (18x18mm body)
• Industrial Temperature range (-40° to +85° C)

Information used to be available at:
http://www.tiogatech.com/TA2040.htm

Technology:	ADSL
Package:	unknown 0 Pin
Linux support:	No