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ATM Chip Database |
- Previous: IDT 77103/77104 IDT 77103/77104
- Up: List all producers
- Next: IDT 77201 SAR Controller for PCI
- Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for four 25.6 Mbps ATM channels
- Compliant to ATM Forum (af-phy-040.000) and ITU-T I.432.5 specifications for 25.6 Mbps physical interface
- Also operates at 51.2 Mbps data rate
- UTOPIA Level 1, UTOPIA Level 2, or DPI-4 Interface
- 3-Cell Transmit & Receive FIFOs
- LED Interface for status signalling
- Supports UTP Category 3 and 5 physical media
- Interfaces to standard magnetics
- Low-Power CMOS
- 3.3V supply with 5V tolerant inputs
- 144-pin PQFP Package (28 x 28 mm)
- Commercial and Industrial Temperature Ranges
IDT (Integrated Device Technology ) : IDT 771254 |
Four-PHY
Features List
The IDT77V1254L25 is a member of IDT's family of products supporting Asynchronous Transfer Mode (ATM) data communications and networking. The IDT77V1254L25 implements the physical layer for 25.6 Mbps ATM, connecting four serial copper links (UTP Category 3 and 5) to one ATM layer device such as a SAR or a switch ASIC. The IDT77V1254L25 also operates at 51.2 Mbps, and is well suited to back-plane driving applications.
The 77V1254L25-to-ATM layer interface is selectable as one of three options: 16-bit UTOPIA Level 2, 8-bit UTOPIA Level 1 Multi-PHY, or quadruple 4-bit DPI (Data Path Interface).
The IDT77V1254L25 is fabricated using IDT's state-of-the-art CMOS technology, providing the highest levels of integration, performance and reliability, with the low-power consumption characteristics of CMOS.
| Technology: | 0.65µ Low Power CMOS |
| Package: | PQFP 144 Pin |
http://www.idt.com/docs/77V1254_DS_65846.pdf
If you are the producer of this chip and want to correct/update the presented information, please feel free to register for direct database access.
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Last update:
14.11. 2009
Last link check: 01.03. 2006 |
All registered names and trademarks are the property of their respective owners. No guarantee is given and no responsibility is taken for the information provided. © 2025 Thomas Martin Knoll knoll@chipweb.de Impressum Datenschutz |
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