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SONET/SDH 155 Mbit/s OC3/OC-12 transceiverThe S3028 SONET/SDH transceiver chip is a fully integrated serialization/deserialization SONET OC-12 (622.08 Mbit/s) and OC-3 (155.52 Mbit/s) interface device. The chip performs all necessary serial-to-parallel and parallel-to-serial functions in conformance with SONET/SDH transmission standards. The device is suitable for SONET-based ATM applications and can be used in conjunction with AMCC's S3026 Clock Recovery device. On-chip clock synthesis is performed by the high-frequency phase-locked loop on the S3028 transceiver chip allowing the use of a slower external transmit clock reference. The S3028 also performs SONET/SDH frame detection. The chip can be used with a 19.44, 38.88, 51.84 or 77.76 MHz reference clock, in support of existing system clocking schemes. The low jitter PECL interface guarantees compliance with the bit-error rate requirements of the Bellcore, ANSI, and ITU-T standards. The S3028 is packaged in a 64 PQFP, offering designers a small package outline.
Technology: | unknown |
Package: | PQFP 64 Pin |
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