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ATM Chip Database |
- Previous: 155 Mbps Single-chip ATM Network Termination Adapter (SANTA) Processor
- Up: List all categories
- Next: NEASCOT-S40C
- supports up to 32k active virtual channels
- performs traffic shaping using dual leaky bucket scheduling algo
- integrates FIFOs for receive and transmit cell buffering
NEC (NEC ) : µPD98401 / µPD98401a |
LOCAL ATM SAR CHIP (NEASCOT-S10 / NEASCOT-S15)
The PD98401 performs all AAL5 functions including Segmentation and Reassembly(SAR). The segmented data, based on various ATM adaption types, is processed into ATM cells. The device also provides CRC-10 generation and verification for AAL3/4 and OAM cells. Features are
Information used to be available at:
http://www.ee.nec.de/Centers/TCAC/atm/upd98401a.html
| Technology: | unknown |
| Package: | PQFP 208 Pin |
web page used to be available at: http://www.ee.nec.de/Centers/TCAC/atm/upd98401a.html
If you are the producer of this chip and want to correct/update the presented information, please feel free to register for direct database access.
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Last update:
14.11. 2009
Last link check: 01.03. 2006 |
All registered names and trademarks are the property of their respective owners. No guarantee is given and no responsibility is taken for the information provided. © 2025 Thomas Martin Knoll knoll@chipweb.de Impressum Datenschutz |
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