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    Toshiba (Toshiba America Electronic Components ) : TC35860/61


    Toshiba introduced this two-chip set in September, 1995, with the TC35860F offering segmentation and the TC35861F offering reassembly. Designed to solve bottleneck issues for high-end servers, especially video on demand (VOD), they comply with ATM Forum UNI 3.1 specifications and support full duplex operation up to 622Mbps. The chip set supports AAL 1 (partial), 3/4 and 5 and 32,000 VC. It contains cyclic redundancy check (CRC), sequence number generation and checking, and error indicators. The set contains four receive queues and each VC may be independently assigned to a specific queue. It shapes traffic with 16 independent rate queues on a per VC basis. The traffic shaping mechanism is programmable with three levels of priority on the traffic shaping. The shaper supports peak rate pacing and sustained burst size of the "leaky bucket" algorithm. The set supports the UTOPIA and offers byte parity on all interfaces.

    Technology: unknown
    Package: PQFP 240 Pin

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