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    IGT (Integrated Telecom Technology ) : WAC-035-B


    The SESAR provides a flexible, upgrade-able solution for performing Ethernet switching and segmentation and reassembly tasks required to communicate over an ATM network. The SESAR accepts packets directly from Ethernet Media AccessControl (MAC) chips, and then translates the packet-based data into 53-byte ATMcells. Features i nclude

    • Directly supports 8 (16) Ethernet segments.
    • Supports up to 32 (64) addresses per Ethernet segment.
    • Ignores packets transferred within a segment.
    • Filters broadcast packets.
    • Directly supports ATM Adaptation Layer five (AAL5) cell Segmentation And Reassembly (SAR).
    • Follows the ATM Forum Available Bit Rate (ABR) specification (based on the ATM Forum EPRC algorithm) to provide rate-based dynamic bandwidth allocation.
    • Supports concurrent Operations And Management (OAM) cells and AAL5 cells on a single active connection.
    • Supports OAM and AAL3/4 transfers through segmentation and reassembly of raw cells.
    • Segments and reassembles data at a maximum rate of 155 (150) Mbps with a 33 MHz SAR clock.
    • Supports simultaneous segmentation / reassembly of up to 15K connections.
    • Supports scatter and gather packet capability for large packets.-
    • Supports 0 to 8 active Virtual Path (VP) bits, and 14 to 6 active VirtualChannel (VC) bits.
    • Transfers cells to the physical layer through the standard UTOPIA FIFO interface or IgTs switch element interface.
    • Can operate as a stand-alone Ethernet switch.
    • Supports CPU processing of packets before transmission in either direction to allow for encapsulation, routing, LANE, and MPOA.
    • Provides packet memory interface via an integrated 32-bit PCI bus interface.
    • Contains a built-in 32-bit connection memory interface.
    • Provides built-in error monitoring and loopback capability.

    Technology: unknown
    Package: unknown 0 Pin

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