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    NEC (NEC ) : µPD98412

    Advanced 1.5G ATM SWITCH LSI (NEASCOT-X15)


    The µPD98412 (NEASCOT-X15) is a single advanced ATM switch LSI chip that has four UTOPIA level 2 interfaces. It enables the switching of 30 x 30 lines based on multi-PHY connection. With its common buffer and a nonblocking switch that enables the use of external SRAM for buffering cells, the chip realizes a switching capacity of 1.5 Gbps.


    • Conforms to ATM Forum UNI Version 3.1 and 4.0.
    • Implements all required switching functions within a single chip.
    • Nonblocking switching realizes a capacity of 1.5 Gbps.
    • Enables the switching of 30 logical ports via four UTOPIA level 2 interfaces.
    • Supports multiple transfer rates (622 Mbps, 155 Mbps, 52 Mbps, 25 Mbps, and so on).
    • Supports both 16K/32K/64K uni-cast VP/VC and 1K/2K/4K multi-cast mode VP/VC.
    • Shared buffer architecture based on standard SRAM.
    • Has a cell buffer capacity of 12.8K/25.6K/51.2K.
    • Supports four QOS classes (CBR, VBR, ABR, and UBR).
    • Performs ABR traffic control (binary mode).
    • Supports early packet discard (EPD) and partial packet discard (PPD) modes.
    • Operates on a single-voltage (3.3 V) power supply (while enabling the direct connection of 5V TTL level signals).
    • Supports the JTAG (IEEE 1149.1) test function.

    Technology: unknown
    Package: BGA 576 Pin

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