Low Cost Monolithic SATURN(TM) SONET/SDH ATM User Network Interface for category-5 (UTP-5), shielded twisted pair (STP) and optical applications.
Implements the ATM transmission convergence (TC) sublayer according to ATM Forum specifications using the SONET/SDH 155.52 Mbit/s STS-3c/STM-1 and 51.84 Mbit/s STS-1 formats.
Provides on-chip UTP/STP drivers, receivers and line equalizers to allow direct connection to 155 Mbit/s UTP-5 or STP twisted pair wiring facilities using line coupling transformers.
Provides a selectable UTP/STP or pseudo-ECL (PECL) interface to allow direct connection to optical data links (ODLs).
Includes clock recovery and clock synthesis with on-chip loop filters.
Operates in timing master or timing slave (loop timed) modes.
Frames to SONET/SDH framing bytes (A1, A2), processes the section and line Bit Interleaved Parity (B1, B2) and the Far-End Block Error (Z2) bytes.
Interprets the H1, H2 and H3 payload pointer bytes.
Processes the SONET path overhead BIP-8 (B3), signal label (C2) and path status (G1) bytes.
Inserts and extracts ATM payloads using ATM cell delineation.
Provides on-chip FIFO buffers in both transmit and receive paths.
Provides on-chip support for GFC and XOFF flow-control.
Provides a synchronous 8-bit plus parity SATURN-Compliant Interface for PHYsical layer devices (SCI-PHY[TM]) bus operating at 50MHz.
Compatible with ATM Forum Utopia interface format.
Provides a generic 8-bit microprocessor bus interface for configuration, control and monitoring.
Provides TTL compatible inputs and outputs and differential PECL inputs.
The IC is manufactured in Low Power 5 Volt CMOS Technology.