ATM Analyzer as PCI card

Diploma Thesis - Thomas M. Knoll


ATM Analyzer board - PIA 155 - passive cell capture hardware Technical Details / Design Tasks
  • Recording of ATM cell streams up to 155 Mb/s (Idle cells included)
  • At the same time - generation of ATM cell streams up to 155 Mb/s
  • Emulation of errored connections by cell manipulation within ATM cell streams
  • Short-length PCI standard card; 5 V; 32 Bit; 33 MHz
  • Optical fibre connector for multi-mode oder single-mode fibre cable
  • Flexible "on-the-fly" cell processing by on-board FPGA
  • Ideal for use in cheaply available Intel PCs
  • Prepared for synchronisation of several Analyzer cards 
  • Linux Device Driver + Test Software
  • continous passive cell capture on harddisk (promiscuous mode)
 

The Diploma Thesis comprised the development of an ATM Analyzer Board which can be used as a test and analysis tool for ATM networks (or ATM-based MPLS networks) in a very flexible way.
The ATM Analyzer Board (also known as PIA155) was developed as short-length PCI standard card for use in any PCI-capable system including cheaply available Intel PCs.  The card connects to the optical fibre using an optical module for OC3 155 Mbit/s. The PCI connection is designed as 5V-32Bit-33MHz-interface. The ATM-Analyzer-Board carries an XILINX FPGA that is used for on-board cell processing and generation. A large variety of ATM cell stream analysing functions and/or generation functions can be performed in real-time by means of the FPGA. The available logic resources allow for complex extensions in future FPGA designs. Compared to ordinary ATM network cards, the ATM-Analyzer is capable of logging the complete (idle cells and to a certain degree even errored cells) ATM cell stream at the receive side as well as generating cell streams up to the line rate at the transmit side. Software has been developed for FPGA initialization via the PCI interface as well as a device driver for Linux. Simple analysing applications have been programmed for demonstrating purposes of the overall board functionality.

Meanwhile, the FPGA design and the accompanying software has been extended to provide permanent passive ATM cell capturing. This way, huge ATM traffic captures could be saved.

More detailed information can be found in an overview documentation (pdf - 1 MB).

Period of thesis work: May 1999 - 5 November 1999 (submission date / product ready for production)

In May 2000, Thomas Knoll received the "Johann Andreas Schubert Award" for his achievements in this Diploma work.

Please feel free to send an e-mail for further information.



© 2002     Thomas Martin Knoll   envelope knoll@chipweb.de