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  • Previous: PIA 155 ATM Analyzer PIA 155
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    IDK (Institut für Datenkommunikation Chemnitz GmbH ) : PIA 622

    ATM Analyzer PIA 622

    The ATM-Analyzer has been especially designed as test and analysis hardware for ATM networks. The utilization of a powerful FPGA (field programmable gate array) in conjunction with a number of on-board memory modules (128Kx36 Bit FIFO and 256Kx32 Bit SRAM) allows for a multitude of possible applications and extensions. For example, the received datastream can be made available completely (including idle cells) or filtered to an analysis application. The numerous extensive statistical functions implemented are running in real-time without causing additional load to the PC systems resources (CPU, PCI bus).
    If used as a controllable data source, the analyzer is able to generate defined net load, which makes testing and analysis of other network components easy. In parallel, all analysis functions are still available with full scope. By means of bit/cell manipulation faulty transmission paths can be emulated. Hence, expensive field trials and test runs can be performed at the laboratory.

    Price per NIC:  4000,- EUR


    external WWW: http://www.indakom.de/inst_d/produkt/pia622.php3

    external PDF: http://www.indakom.de/inst_d/produkt/pia622e.pdf


    If you are the producer of this NIC and want to correct/update the presented information, please feel free to register for direct database access.
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