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ATM Tranparent Multimedia Interface Specification
(ATMIS?) ATMIS? is an interface between the ATM device driver and the upper SW stack. It is located between the AAL layer and upper layers
respective the ATM reference model. This interface enables very fast data
transport especially for ATM traffic beside the usual TCP/IP stack.
The ATMIS? interface makes PSC the ideal ATM adapter card for high
bitrate and/or realtime Multimedia data.
PCI Interface AAL5 SAR
All necessary functions for variable bit rate
data transfer (AAL5 and AAL3/4) are performed in the hardware. Transparent AAL0
frame processing for constant bit rate services is executed in hard- and
software. Located on a half-size PCI card, the segmentation and reassembly
device provides optimized ATM cell and AAL5, AAL3/4 and OAM frame functions.
The Microsoft Windows NT®-based ATM software offers trans-parent support
for the NDIS 3.0® protocol stack and a general purpose program-ming
inter-face that provides direct access to the ATM specific network features. The
software is ready to support evolving standards.
SONET/SDH Chip (STS-3/STM-1)
The adaptor card contains a single chip
receiver/transmitter for transporting 53-Byte ATM cells at SDH/STM-1 and
SONET/STS-3c data speeds of 155 Mbps. Electromagnetic interference is
significantly reduced by an on-chip clock circuit that generates a system clock
of 155 MHz from a 19 MHz oscillator.
SC Duplex Transceiver
A SC connector interfaces to a duplex 62.5/125µ
multimode fibre (2 km max.). Other examples of physical media interfaces are
available upon demand.
PCI-Configuration The PCI SAR provides internal PCI configuration
registers to support its initialization and error-handling functions.
- ATM cell processing per ANSI T1.627; ITU-T I.361, I.363 and ATM Forum UNI
- ATM Forum LAN Emulation v1.0
- PCI local bus specification v2.0
- PCI local bus specification v2.0
- Operating Temp.: 0°C - 70°C
- Humidity: 5%-95% noncondsng.
Our network interface cards should be considered as a basic solution that
we will adapt to your environment. No matter if your network infrastructure
consists of copper wiring or if you need a specific interface on ATM for your
preferred application, we will provide you with the optimal access to broadband
Control Memory The architecture of the device supports VBR and UBR
traffic. Using 256 KByte of local control memory, the ATM155-PSC offers support
of up to 1023 virtual circuits on the transmit side and up to 1023 virtual
circuits on the receive side. Each virtual circuit can be individually
configured for bit rate and AAL type.
For data transfers, the device accesses direct memory access master
transfers with 32 and 16 byte bursts. Host memory data buffers are efficiently
managed by descriptor rings and scatter-gather data transfers. The software
device driver provides a packet-level interface and makes ATM functionality
trans-parent for the user.
The ATM155-PSC is compatible to any PCI-based platform equipped with one
available, fully-PCI compliant slot and running under Windows NT 3.5®. It
requires at least a 486 processor and 16 MBytes of memory.
- PCI Clock: 25 - 33 MHz
- Max. PCI Burst Rate: 80 MByte/s
- Dimensions: Short single PCI slot
- Power Consumption: 1 A max. @ +5 V
- Fully compliant with ATM Forum UNI v3.1
- Windows NT® 3.5 operating system support
- Implementation of the new ATM Forum LAN emulation standard for transparent
support for existing ethernet and token ring environments
- Supports up to 1023 VCs on the transmit side and 1023 VCs on the receive
- Features ATM Adaptation Layer for variable bit rate services
- Onboard SAR chip performs full duplex ATM and AAL processing
- Packets in the host memory are directly accessed by 32 bit PCI master
- High performance SONET/STS3c and SDH/STM1 physical layer interface
- Supports full duplex 155 Mbps data transmission over 62.5/125µ
- Fully compatible with the PCI bus specifications and designed for the PCI
plug & play concept
Documentation used to be available at:
web page used to be available at: http://www.sican.de/homepage/systems_solutions/hi_speed_datakom/page2.html
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