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ATM Switching Matrix
- Self-routing 32 x 16 switching matrix with multicast capability
- High performance: 10E-11 cell loss probability (at 95%
Bernoulli type traffic).
- Central buffer architecture provides minimum cell delay variation
at high data throughput.
- Routing header provides 48 bit routing address.
- Expandable up to 256 x 256 non-blocking s
witching network core.
- Configuration as multiplexer / concentrator
- Prepared for 622 Mbps and 2.5 Gbps ports
- Switch Link Interface interconnects (200 Mbps serial,
differential data link lines)
LI>Switch Link Interface uses LVDS levels for low crosstalk,
and low power consumption.
- Individual phase adaption per input; no seperate clock required
Technology: || unknown|
Package: ||BGA 342 Pin|
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