ATM ChipWeb logo



New Chip


News Letter


ATM Chip Database

  • Previous: SANTA-Lite
  • Up: List all categories
  • Next: µPD98404(NEASCOT-P30)

  • NEC (NEC ) : µPD98402A

    µPD98402A (NEASCOT-P15)

    This TC Sub layer controller performs function in conformance withthe ATM forum specification for cell transport over SONET at STS-3c/STM1 rate of 155 Mbps. It has UTOPIA cell interface and provides adifferential PECL signal for direct interface to an optical module.A internal loopback both at the media side and the ATM layer side is supported.

    Information used to be available at:

    Technology: 0.35µ CMOS
    Package: PQFP 160 Pin

    external WWW: NEC : web page used to be available at:

    external PDF: NEC : PDF documentation used to be available at:
    If you are the producer of this chip and want to correct/update the presented information, please feel free to register for direct database access.
ChipWeb Home

Last update: 14.11. 2009
Last link check: 01.03. 2006
All registered names and trademarks are the property of their respective owners.
No guarantee is given and no responsibility is taken for the information provided.
© 2018     Thomas Martin Knoll
100G Ethernet
Next Generation SDH
back Kirche Reichenbach Vogtland