- Previous: µPD98411 (NEASCOT-P40)
- Up: List all categories
Routing Control, Monitoring and Policing 800Mbit/s
- Monolithic single chip device which handles ATM switch Ingress VPI/VCI address translation, cell appending, cell rate policing, counting, and OAM requirements for 65,536 VCs (virtual circuits).
- Instantaneous transfer rate of 800 Mbits supports a cell transfer rate of 1.42x106 cells/s.
- 8 or 16 bit PHY interface using direct addressing for up to 4 PHYs (Utopia Level 1) and Multi-PHY addressing for up to 32 PHYs (Utopia Level 2).
- 8 or 16 bit SCI-PHY+ (53 - 64 byte extended ATM cell with prepend/postpend) interface at output to switch fabric.
- Compatible with wide range of switching fabrics and traffic management architectures including per VC or per PHY queuing.
- Provides identification/tagging of RM cells to support adjunct processing applications such as Virtual Source/Virtual Destination ABR service.
- Supports logical multicast.
- Extremely flexible CAM-type cell identification which uses arbitrary VPI/VCI values and/or appended bytes for identification.
- Drops on command all low priority (CLP=1) cells to relieve switch congestion.
- Includes 16-bit FIFO buffered microprocessor bus interface for cell extraction and insertion (including OAM), VC table access, control and status monitoring, and configuration of the IC.
- Supports DMA access for cell extraction and insertion.
- Low power, 0.6 micron, +5 Volt CMOS technology.
Technology: ||0.65µ Low Power CMOS|
Package: ||PQFP 240 Pin|
PDF documentation used to be available at: http://www.pmc-sierra.com/extras/actions/di_session.asp?DIurl=/products/pdf/1941029.pdf&diTitle=RCMP%2D800+Short+Form+Da
If you are the producer of this chip and want to correct/update the presented information, please feel free to register for direct database access.