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    Zarlink (Zarlink Semiconductor ) : MT90528

    28-Port Primary Rate Circuit Emulation AAL1 SAR

    The MT90528 28-Port Primary Rate Circuit Emulation AAL1 SAR allows primary rate TDM circuits to be carried over ATM networks using Circuit Emulation Services. Up to 896 bi-directional ATM VC connections can be simultaneously processed by the MT90528 CES AAL1 SAR device.

    • AAL1 Segmentation and Reassembly device compliant with Circuit Emulation Services (CES) standard (af-vtoa-0078.000)
    • Supports both Unstructured and Structured Circuit Emulation of 28 independent DS1/E1/STBUS interfaces
    • Supports AAL1 trunking, with up to 128 TDM channels per VC (af-vtoa-0089.001)
    • Supports CAS transmission and reception in all structured modes of operation
    • Supports simultaneous processing of up to 896 bidirectional Virtual Circuits
    • Supports mixed DS1/E1 operation
    • Supports mixed Unstructured and Structured CES operation
    • Fully flexible DS0 assignment
    • Complete clock recovery solution provided onchip: Synchronous, Adaptive, or Synchronous Residual Time Stamp (SRTS) via 28 independent PLLs
    • Dual-mode (ATM-end or PHY-end) UTOPIA port operates in Level 1 or Level 2 mode for connection to external PHY or ATM devices with UTOPIA clock rate up to 52 MHz

    Technology: CMOS
    Package: PBGA 456 Pin


    external WWW: http://products.zarlink.com/product_profiles/MT90528.htm


    external PDF: Zarlink Semiconductor : http://assets.zarlink.com/products/datasheets/zarlink_MT90528_SEP_02.pdf PDF documentation used to be available at: http://assets.zarlink.com/products/datasheets/zarlink_MT90528_SEP_02.pdf
    If you are the producer of this chip and want to correct/update the presented information, please feel free to register for direct database access.
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