ATM ChipWeb logo

 

Chips
NICs
Links

New Chip
New NIC

Register
Login

News Letter

Forum
About

ATM Chip Database


  • Previous: µPD98411 (NEASCOT-P40)
  • Up: List all categories

    NEC (NEC ) : µPD98412

    Advanced 1.5G ATM SWITCH LSI (NEASCOT-X15)


    OVERVIEW

    The µPD98412 (NEASCOT-X15) is a single advanced ATM switch LSI chip that has four UTOPIA level 2 interfaces. It enables the switching of 30 x 30 lines based on multi-PHY connection. With its common buffer and a nonblocking switch that enables the use of external SRAM for buffering cells, the chip realizes a switching capacity of 1.5 Gbps.

    FEATURES

    • Conforms to ATM Forum UNI Version 3.1 and 4.0.
    • Implements all required switching functions within a single chip.
    • Nonblocking switching realizes a capacity of 1.5 Gbps.
    • Enables the switching of 30 logical ports via four UTOPIA level 2 interfaces.
    • Supports multiple transfer rates (622 Mbps, 155 Mbps, 52 Mbps, 25 Mbps, and so on).
    • Supports both 16K/32K/64K uni-cast VP/VC and 1K/2K/4K multi-cast mode VP/VC.
    • Shared buffer architecture based on standard SRAM.
    • Has a cell buffer capacity of 12.8K/25.6K/51.2K.
    • Supports four QOS classes (CBR, VBR, ABR, and UBR).
    • Performs ABR traffic control (binary mode).
    • Supports early packet discard (EPD) and partial packet discard (PPD) modes.
    • Operates on a single-voltage (3.3 V) power supply (while enabling the direct connection of 5V TTL level signals).
    • Supports the JTAG (IEEE 1149.1) test function.

    Technology: unknown
    Package: BGA 576 Pin


    external WWW: http://www.ee.nec.de/applications/communication/z_products/assp/atm/upd98412.html

    external PDF: http://www.ee.nec.de/_pdf/S14237EJ2V0DSJ1.PDF


    If you are the producer of this chip and want to correct/update the presented information, please feel free to register for direct database access.
ChipWeb Home

Last update: 14.11. 2009
Last link check: 01.03. 2006
All registered names and trademarks are the property of their respective owners.
No guarantee is given and no responsibility is taken for the information provided.
© 2017     Thomas Martin Knoll  knoll@chipweb.de
100G Ethernet
Next Generation SDH
BGP-QoS.org
back Kirche Reichenbach Vogtland